What Is the Best Voltage Regulator to Get for a 2014 Ultra
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Supply Clean Power with Ultralow Racket LDO Regulators
Linear regulator integrated circuits (ICs) step a voltage down from a college voltage to a lower voltage without the demand of an inductor. The depression dropout (LDO) linear regulator is a special type of linear regulator in which the dropout voltage—the differential between the input-to-output voltage needed to maintain regulation—is typically below 400 mV. Early on linear regulator designs offered dropouts on the society of ~1.3 V, significant for a 5 V input, the maximum achievable output was only ~iii.7 V for the device to stay in regulation. Nonetheless, in these days of more sophisticated blueprint techniques and wafer fabrication processes, the approximate definition of low is <100 mV to 300 mV or so.
Furthermore, although the LDO regulator is often one of the least costly components in any given system, it is frequently one of the most valuable components from a cost/benefit basis. In add-on to output voltage regulation, some other of the LDO regulator'south central tasks is to protect expensive downstream loads from harsh environmental conditions such as voltage transients, power supply noise, contrary voltage, current surges, etc. In short, its design must be robust and contain all the protection features needed to blot the penalization from its environment while protecting the load. Many low price LDO linear regulators practise non have the necessary protection features and thus fail, often causing harm not only to the regulator itself, just as well the downstream load.
LDO Regulators vs. Other Regulators
Depression voltage footstep-down conversion and regulation can be accomplished via a diversity of methods.
Switching regulators operate with high efficiency over a wide range of voltages but require external components such as inductors and capacitors for operation, thus taking up a relatively larger lath area. Inductorless charge pumps (or switched capacitor voltage converters) can also exist used to achieve lower voltage conversion and typically operate with higher efficiency depending on the conversion region, simply are limited in output electric current capability, endure from poor transient performance, and require more external components vs. those of a linear regulator.
Today'due south generation of fast, college current, low voltage digital ICs, such as FPGAs, DSPs, CPUs, GPUs, and ASICs, have placed more stringent demands on supplies that power the core and I/O channels. Traditionally, because accuse pumps lack the necessary output current and transient response, efficient switching regulators accept been used to power these devices. However, switchers take potential racket interference issues, and sometimes they have a slow transient response and layout limitations.
Thus, LDO regulators are an alternative in these applications, likewise equally other depression voltage systems. Thanks to recent product innovations and feature enhancements, LDO regulators offer some functioning benefits that make them more desirable.
Furthermore, when it comes to powering noise sensitive analog/RF applications (ordinarily found in test and measurement systems, where the measurement accuracy of the automobile or equipment needs to be orders of magnitude better than the entity being measured), LDO regulators are by and large preferred over their switching counterparts. Low racket LDO regulators power a broad range of analog/RF designs, including frequency synthesizers (PLLs/VCOs), RF mixers and modulators, high speed and high resolution data converters, and precision sensors. Nonetheless, these applications have reached sensitivities that are testing the limits of conventional depression noise LDO regulators. For instance, in many loftier end VCOs, power supply noise direct affects the VCO output stage dissonance (jitter). Moreover, to meet overall organization efficiency requirements, the LDO regulator usually postregulates the output of a relatively noisy switching converter, and so the high frequency power supply ripple rejection (PSRR) performance of the LDO becomes paramount. Farther, racket levels may exist reduced by two to three orders of magnitude by an LDO regulator compared to a standard industry switching regulator from the mV (rms) range to the single-digit μV (rms) range.
LDO Design Challenges
Some ICs, such as operational amplifiers and instrumentation amplifiers, plus data converters such as digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), are referred to as dual polarity because they require two input supplies for power: one positive and one negative. The positive rail has typically been powered by a positive voltage reference or, even improve, a linear or low dropout regulator. The negative rail was traditionally powered past a negative switching regulator or inverter. Nevertheless, the inductor-based switcher can hands introduce noise into the system. With the advent of negative regulators, information technology has become advantageous to power the negative organization rail with a negative LDO regulator and take advantage of all the LDO regulator features (no inductor, lower noise, college PSRR, fast transient response, bulletproof protection). Older vintage LDO regulators accept much worse PSRR and dissonance performance, and while they still tin exist used to create these types of quiet supplies, it takes a lot of actress components, lath space, and design fourth dimension to put a system together. These actress components likewise tin adversely affect the power upkeep depending on their characteristics (parasitic resistance, etc.)
There is some other difficult arrangement performance characteristic for customers using an op amp, ADC, or other signal chain component: these ICs do not take infinite supply rejection capability and, worse, the supply rejection capability can exist significantly lower at high frequency. In the by, this has meant using extra filtering components on the board, which increases solution size. Further, if a designer is trying to obtain higher accuracy, more trouble may result if the regulator supply has excessive noise, which causes unwanted variation in a measurement scenario.
Plenty of manufacture-standard linear regulators perform the low dropout performance with a single voltage supply, all the same virtually cannot achieve the combination of very depression voltage conversion with low output noise, wide ranging input/output voltages, and all-encompassing protection features. PMOS LDO regulators achieve the dropout and run on a single supply but are limited at low input voltages by the pass transistor'south VGS characteristics and they lack the many protection features from high performance regulators. NMOS-based devices offer a fast transient response but require two supplies to bias the device. NPN regulators offer a broad input and output voltage range, simply they require two supply voltages or have college dropout. Past contrast, with the proper blueprint architecture, a PNP regulator can achieve low dropout, high input voltage, depression noise, loftier PSRR, and very low voltage conversion with bulletproof protection and all from a single-supply rails.
For best overall efficiency, many high performance analog and RF circuits are powered from LDO regulators postregulating the output of a switching converter. This requires high PSRR and low output voltage noise at depression input-to-output differentials across the LDO regulator. An LDO regulator with high PSRR easily filters and rejects racket from the switcher's output without requiring bulky filtering components. Further, a device with low output voltage noise across a broad bandwidth is beneficial for today's modern rails where noise sensitivity is a cardinal consideration. Low output voltage dissonance at loftier currents is conspicuously a must-have specification.
New Ultralow Noise, Ultrahigh PSRR LDO Regulators
It'southward clear that an LDO solution that solves the issues outlined herein should have the post-obit attributes:
- Very depression output noise
- High PSRR across a wide range of frequencies
- Low dropout operation
- Single-supply operation (for ease of apply and relaxed supply sequencing challenges)
- Fast transient response time
- Operation over a wide input/output voltage range
- Moderate output current capability
- Excellent thermal performance
- Compact footprint
To accost these specific needs, Analog Devices introduced its LT304x family of ultrahigh PSRR, ultralow noise positive LDO regulators. The newest member is the complementary LT3094, an ultralow noise, ultrahigh PSRR low dropout voltage 500 mA negative linear regulator. This device is a negative version of the popular 500 mA LT3045 (LT3042 for 200 mA). The LT3094's unique pattern features ultralow spot dissonance of only 2 nV/√Hz at 10 kHz and 0.85 μV rms integrated output noise across a wide ten Hz to 100 kHz bandwidth. PSRR performance is exceptional: low frequency PSRR exceeds 100 dB out to most 4 kHz and loftier frequency PSRR exceeds lxx dB out to 2 MHz, quieting noisy or high ripple input supplies. The LT3094 utilizes a proprietary LDO architecture: a precision current source reference followed by a high performance unity-gain buffer, which results in near abiding bandwidth, noise, PSRR, and load regulation performance, independent of output voltage. In addition, this architecture permits paralleling of multiple LT3094s to further decrease noise, increment output current, and spread oestrus on a printed circuit board.
The LT3094 delivers up to 500 mA output electric current with a 230 mV dropout voltage at full load, across a wide –2 5 to –xx V input voltage range. The output voltage range is 0 V to –nineteen.five V and the output voltage tolerance is highly accurate at ±two% over line, load, and temperature. The device's wide input and output voltage ranges, high bandwidth, high PSRR, and ultralow noise performance are ideal for powering noise sensitive applications such as PLLs, VCOs, mixers, and LNAs; very low racket instrumentation such equally test and measurement, and loftier speed/loftier precision data converters; medical applications such every bit imaging and diagnostics, and precision power supplies; and postregulators for switching ability supplies.
The LT3094 operates with a pocket-size, low cost, 10 μF ceramic output capacitor that optimizes stability and the transient response. A single resistor programs the external precision current limit (±10% overtemperature). The device'southward VIOC pin controls an upstream regulator to minimize ability dissipation and optimize PSRR. A single SET pivot capacitor lowers output dissonance and provides reference soft showtime functionality, preventing output voltage overshoot at turn-on. Moreover, the device's internal protection circuitry includes internal current limit with foldback and thermal limit with hysteresis. Other features include fast start-up capability (useful if a large value Gear up pivot capacitor is used) and a power skilful flag (the industry's commencement negative LDO regulator with this function) with a programmable threshold to signal output voltage regulation.
Figure 1. LT3094 typical application schematic and features.
The LT3094 is available in thermally enhanced 12-atomic number 82, 3 mm × 3 mm DFN and MSOP packages, both with a meaty footprint. The E- and I-grade versions are available from stock with an operating junction temperature of –40°C to +125°C.
The LT3094 requires an output capacitor for stability. Given its high bandwidth, it is recommended to employ low ESR and ESL ceramic capacitors. A minimum ten μF output capacitance with an ESR below 30 mΩ and an ESL below 1.v nH is required for stability. Given the loftier PSRR and low racket operation attained with using a single 10 μF ceramic output capacitor, larger values of output capacitor only marginally amend the performance considering the regulator bandwidth decreases with increasing output capacitance—hence, there is little to exist gained by using larger than the minimum 10 μF output capacitor. However, larger values of output capacitance do decrease tiptop output deviations during a load transient.
Effigy 2. LT3094 PSRR functioning.
Figure iii. LT3094 output noise performance.
Benefits of Parallel Devices
Higher output electric current is obtained by paralleling multiple LT3094s. Tie all SET pins together and all IN pins together. Connect the OUT pins together using pocket-size pieces of PCB trace (used as a ballast resistor) to equalize currents in the LT3094. More than two LT3094s can also be paralleled for fifty-fifty higher output current and lower output racket. The output noise decrease is proportional to the square-root of the number of devices in parallel. Paralleling multiple LT3094s is besides useful for distributing estrus on the PCB. For applications with a loftier input-to-output voltage differential, an input series resistor or resistor in parallel with the LT3094 can also exist used to spread oestrus. See Effigy 4 for a parallel circuit implementation.
Figure four. LT3094 parallel operation.
Tabular array 1 shows the members of ADI's ultrahigh PSRR, ultralow dissonance family unit of LDO regulators.
| Part # | 5IN Range | FiveOUT Range | IOUT | Dropout Voltage | PSRR @ 1 MHz | Output Racket | Spot Racket | Packages |
| Negative LDO Regulators | ||||||||
| LT3094 | –two.0 Five to –xx 5 | 0 V to –19.5 Five | –500 mA | 300 mV | 75 dB | 0.8 μV rms | 2.ii nV/√Hz | 12-lead MSOP, 3 × 3, 12-lead DFN |
| Positive LDO Regulators | ||||||||
| LT3042 | 1.8 Five to 20 V | 0 V to –15 V | 200 mA | 350 mV | 79 dB | 0.viii μV rms | 2.ii nV/√ Hz | 12-lead MSOP, iii × 3, 10-lead DFN* |
| LT3045 | 1.eight V to xx V | 0 Five to –15 V | 500 mA | 260 mV | 76 dB | 0.8 μV rms | 2.2 nV/√ Hz | 12-lead MSOP, 3 × 33, 10-lead DFN* |
| *Pin-uniform | ||||||||
Conclusion
The positive 200 mA LT3042, 500 mA LT3045, and, now, the new complementary LT3094 negative 500 mA LDO offer breakthrough noise and PSRR performance. These attributes, coupled with their wide voltage range, depression dropout voltage, extensive protection features/robustness, and ease of use, make them ideal for powering racket sensitive bipolar positive/negative rails in test and measurement or medical imaging systems, for example. With their current reference-based architecture, noise and PSRR performance remain independent of the output voltage. Additionally, multiple devices can be directly paralleled to further reduce output noise, increase output current and spread heat on the PCB. The LT3042, LT3045, and LT3094 relieve time and price while improving application performance.
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Source: https://www.analog.com/en/technical-articles/supply-clean-power-with-ultralow-noise-ldo-regulators.html
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